CMOS Logic Design for NAND based SR Latch - YouTube
Monostables
Monostables
CD54HCT74 data sheet, product information and support | TI.com
Design and analysis of ultra‐low power 18T adaptive data track flip‐flop for high‐speed application - Kumar Mishra - 2021 - International Journal of Circuit Theory and Applications - Wiley Online Library
CMOS Logic Structures
Solved a) Explain how a J-K flip flop is converted into D | Chegg.com
Design and Implementation of Sequential Circuit Based On Low Power Using 45nm Technology
Problem 9: The circuit shown is a CMOS SR flip-flop. | Chegg.com